Messages in this thread Patch in this message | | | From | Ludovic Barre <> | Subject | [PATCH 14/19] mmc: mmci: add clock divider for stm32 sdmmc | Date | Tue, 12 Jun 2018 15:14:35 +0200 |
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From: Ludovic Barre <ludovic.barre@st.com>
The STM32 sdmmc variant has a different clock divider.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com> --- drivers/mmc/host/mmci.c | 2 ++ drivers/mmc/host/mmci.h | 2 ++ 2 files changed, 4 insertions(+)
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 9af7db8..e24fd1e 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -1451,6 +1451,8 @@ static int mmci_probe(struct amba_device *dev, */ if (variant->st_clkdiv) mmc->f_min = DIV_ROUND_UP(host->mclk, 257); + else if (variant->stm32_clkdiv) + mmc->f_min = DIV_ROUND_UP(host->mclk, 2046); else if (variant->explicit_mclk_control) mmc->f_min = clk_round_rate(host->clk, 100000); else diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index 4b4cd1d..227927e 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -252,6 +252,7 @@ struct mmci_host; * @data_cmd_enable: enable value for data commands. * @st_sdio: enable ST specific SDIO logic * @st_clkdiv: true if using a ST-specific clock divider algorithm + * @stm32_clkdiv: true if using a STM32-specific clock divider algorithm * @datactrl_mask_ddrmode: ddr mode mask in datactrl register. * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl * register @@ -312,6 +313,7 @@ struct variant_data { bool datacnt_remain; bool st_sdio; bool st_clkdiv; + bool stm32_clkdiv; bool blksz_datactrl16; bool blksz_datactrl4; u32 pwrreg_powerup; -- 2.7.4
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