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SubjectRe: [RFC PATCH 00/16] x86/split_lock: Enable #AC exception for split locked accesses
On Tue, May 29, 2018 at 09:40:09AM -0700, Dave Hansen wrote:
> On 05/27/2018 08:45 AM, Fenghua Yu wrote:
> > A split lock is any atomic operation whose operand crosses two cache
> > lines. Since the operand spans two cache lines and the operation must
> > be atomic, the system locks the bus while the CPU accesses the two cache
> > lines.
> Could you give us a bit of an idea why this is RFC? What needs review?
> What needs commenting-on? What is left before you think this can be
> merged? Where would you like Thomas, Ingo, and other reviewers to focus
> their attention?
> One thing we from Intel can be horrible about is launching in to the
> details of the hardware implementation instead of focusing on the
> software implications. For instance, you launch into the details of bus
> locks without mentioning key things like:
> Split-lock-detection is a new hardware feature that generates
> alignment-check (#AC) faults to help detect when badly-aligned atomic
> instructions might impact whole-system performance. These patches are
> primarily targeted at application-level issues, but we can also detect
> the same issues in the kernel. There is a significant interaction
> between this feature and firmware because firmware may or may not be
> prepared for this feature to be enabled.

Hi, Thomas, Ingo, and other reviewers,

Currently I only got feedback from Intel people (Dave, Alan, Tony, Ashok,
etc). So far I haven't seen any feedback from you.

Does the patch set handle the feature of #AC for split lock right e.g.
in areas like enumeration, interaciton with firmware, etc? Does it handle
usage case right e.g. the configuration, debugfs interface,etc? Need any
coding improvement?

Thank you very much!


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