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Subject[PATCH 4.14 307/496] qede: Fix barrier usage after tx doorbell write.
4.14-stable review patch.  If anyone has any objections, please let me know.


From: Manish Chopra <>

[ Upstream commit b9fc828debc8ac2bb21b5819a44d2aea456f1c95 ]

Since commit c5ad119fb6c09b0297446be05bd66602fa564758
("net: sched: pfifo_fast use skb_array") driver is exposed
to an issue where it is hitting NULL skbs while handling TX
completions. Driver uses mmiowb() to flush the writes to the
doorbell bar which is a write-combined bar, however on x86
mmiowb() does not flush the write combined buffer.

This patch fixes this problem by replacing mmiowb() with wmb()
after the write combined doorbell write so that writes are
flushed and synchronized from more than one processor.

This patch was marked as "superseded" in patchwork.
(Not really sure for what reason).Resending it as v2.

Signed-off-by: Ariel Elior <>
Signed-off-by: Manish Chopra <>

Signed-off-by: David S. Miller <>

Signed-off-by: Sasha Levin <>
Signed-off-by: Greg Kroah-Hartman <>
drivers/net/ethernet/qlogic/qede/qede_fp.c | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)

--- a/drivers/net/ethernet/qlogic/qede/qede_fp.c
+++ b/drivers/net/ethernet/qlogic/qede/qede_fp.c
@@ -320,13 +320,11 @@ static inline void qede_update_tx_produc
writel(txq->tx_db.raw, txq->doorbell_addr);

- /* mmiowb is needed to synchronize doorbell writes from more than one
- * processor. It guarantees that the write arrives to the device before
- * the queue lock is released and another start_xmit is called (possibly
- * on another CPU). Without this barrier, the next doorbell can bypass
- * this doorbell. This is applicable to IA64/Altix systems.
+ /* Fence required to flush the write combined buffer, since another
+ * CPU may write to the same doorbell address and data may be lost
+ * due to relaxed order nature of write combined bar.
- mmiowb();
+ wmb();

static int qede_xdp_xmit(struct qede_dev *edev, struct qede_fastpath *fp,

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