Messages in this thread Patch in this message | | | From | Abhishek Sahu <> | Subject | [PATCH v3 04/16] dt-bindings: qcom_nandc: remove nand-ecc-step-size | Date | Fri, 25 May 2018 17:51:32 +0530 |
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QCOM NAND controller supports only one step size (512) but nand-ecc-step-size is required property in DT. This DT property can be removed and ecc step size can be assigned in driver with 512 value.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> ---
Currently there is no user in mainline linux kernel for QPIC. Following patches for this node is in review
https://patchwork.kernel.org/patch/10426405/ https://patchwork.kernel.org/patch/10426385/
If these changes got merged then I will submit another change to remove the nand-ecc-step-size from actual DTS.
* Changes from v2:
NEW CHANGE
Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 3 --- 1 file changed, 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt index f246aa0..1123cc6 100644 --- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt +++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt @@ -45,7 +45,6 @@ Required properties: number (e.g., 0, 1, 2, etc.) - #address-cells: see partition.txt - #size-cells: see partition.txt -- nand-ecc-step-size: must be 512. see nand.txt for more details. Optional properties: - nand-bus-width: see nand.txt @@ -79,7 +78,6 @@ nand-controller@1ac00000 { reg = <0>; nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; nand-bus-width = <8>; partitions { @@ -119,7 +117,6 @@ nand-controller@79b0000 { nand@0 { reg = <0>; nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; nand-bus-width = <8>; partitions { -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
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