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SubjectRE: [PATCH] x86: pad assembly functions with INT3
On May 14, 2018 2:04:38 AM PDT, David Laight <David.Laight@ACULAB.COM> wrote:
>From: H. Peter Anvin
>> Sent: 11 May 2018 19:54
>> On 05/10/18 09:39, David Laight wrote:
>> > From: Alexey Dobriyan
>> >> Sent: 07 May 2018 22:38
>> >>
>> >> Use INT3 instead of NOP. All that padding between functions is
>> >> an illegal area, no legitimate code should jump into it.
>> >>
>> >> I've checked x86_64 allyesconfig disassembly, all changes looks
>> >> INT3 is only used after RET or unconditional JMP.
>> >
>> > I thought there was a performance penalty (on at least some cpu)
>> > depending on the number of and the actual instructions used for
>> >
>> > I believe that is why gcc generates a small number of very long
>> > instructions when padding code.
>> >
>> There is a performance penalty for using NOP instructions *in the
>> fallthrough case.* In the case where the padding is never supposed
>> be executed, which is what we're talking about here, it is
>Not completely irrelevant, the instructions stream gets fetched and
>beyond the jmp/ret at the end of the function.
>At some point the cpu will decode the jmp/ret and fetch/decode from the
>target address.
>I guess it won't try to speculatively execute the 'pad' instructions
>- but you can never really tell!
> David

The CPU doesn't speculate down past an unconditional control transfer. Doing so would be idiotic.
Sent from my Android device with K-9 Mail. Please excuse my brevity.

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