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    Subject[PATCH AUTOSEL for 4.15 106/189] ntb_hw_switchtec: Check for alignment of the buffer in mw_set_trans()
    Date
    From: Logan Gunthorpe <logang@deltatee.com>

    [ Upstream commit 1e2fd202f8593985cdadca32e0c322f98e7fe7cb ]

    With Switchtec hardware, the buffer used for a memory window must be
    aligned to its size (the hardware only replaces the lower bits). In
    certain circumstances dma_alloc_coherent() will not provide a buffer
    that adheres to this requirement like when using the CMA and
    CONFIG_CMA_ALIGNMENT is set lower than the buffer size.

    When we get an unaligned buffer mw_set_trans() should return an error.
    We also log an error so we know the cause of the problem.

    Signed-off-by: Logan Gunthorpe <logang@deltatee.com>
    Signed-off-by: Jon Mason <jdmason@kudzu.us>
    Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
    ---
    drivers/ntb/hw/mscc/ntb_hw_switchtec.c | 13 +++++++++++++
    1 file changed, 13 insertions(+)

    diff --git a/drivers/ntb/hw/mscc/ntb_hw_switchtec.c b/drivers/ntb/hw/mscc/ntb_hw_switchtec.c
    index ca0334a6b759..fc9ce0a31c04 100644
    --- a/drivers/ntb/hw/mscc/ntb_hw_switchtec.c
    +++ b/drivers/ntb/hw/mscc/ntb_hw_switchtec.c
    @@ -315,6 +315,19 @@ static int switchtec_ntb_mw_set_trans(struct ntb_dev *ntb, int pidx, int widx,
    if (xlate_pos < 12)
    return -EINVAL;

    + if (!IS_ALIGNED(addr, BIT_ULL(xlate_pos))) {
    + /*
    + * In certain circumstances we can get a buffer that is
    + * not aligned to its size. (Most of the time
    + * dma_alloc_coherent ensures this). This can happen when
    + * using large buffers allocated by the CMA
    + * (see CMA_CONFIG_ALIGNMENT)
    + */
    + dev_err(&sndev->stdev->dev,
    + "ERROR: Memory window address is not aligned to it's size!\n");
    + return -EINVAL;
    + }
    +
    rc = switchtec_ntb_part_op(sndev, ctl, NTB_CTRL_PART_OP_LOCK,
    NTB_CTRL_PART_STATUS_LOCKED);
    if (rc)
    --
    2.15.1
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