Messages in this thread | | | Subject | Re: [PATCH v2 2/2] x86/mm: implement free pmd/pte page interfaces | From | Chintan Pandya <> | Date | Fri, 27 Apr 2018 19:12:57 +0530 |
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On 4/27/2018 6:18 PM, joro@8bytes.org wrote: > On Fri, Apr 27, 2018 at 05:22:28PM +0530, Chintan Pandya wrote: >> I'm bit confused here. Are you pointing to race within ioremap/vmalloc >> framework while updating the page table or race during tlb ops. Since >> later is arch dependent, I would not comment. But if the race being >> discussed here while altering page tables, I'm not on the same page. > > The race condition is between hardware and software. It is not > sufficient to just remove the software references to the page that is > about to be freed (by clearing the PMD/PUD), also the hardware > references in the page-walk cache need to be removed with a TLB flush. > Otherwise the hardware can use the freed (and possibly reused) page to > establish new TLB entries.
Sure ! This is my understanding too (from arm64 context).
> > > > Joerg > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel >
Chintan -- Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
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