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SubjectRe: [PATCH] clk: aspeed: Prevent reset if clock is enabled
On Thu, Mar 8, 2018 at 4:08 PM, Lei YU <mine260309@gmail.com> wrote:
> On Thu, Mar 8, 2018 at 11:42 AM, Joel Stanley <joel@jms.id.au> wrote:
>>> + /* Only reset/enable/unreset if clock is stopped */
>>> + regmap_read(gate->map, ASPEED_CLK_STOP_CTRL, &reg);
>>> + if (!(reg & clk))
>>> + return 0;
>>
>> This doesn't generalise to all of the clocks, as some clocks use set
>> to disable. Perhaps we could do something like this:
>>
>> /* Only reset/enable/unreset if clock is stopped. The LPC clock
>> on ast2500 has issues otherwise */
>> enval = (gate->flags & CLK_GATE_SET_TO_DISABLE) ? 0 : clk;
>> regmap_read(gate->map, ASPEED_CLK_STOP_CTRL, &reg);
>> if ((reg & clk) == enval) {
>> spin_unlock_irqrestore(gate->lock, flags);
>> return 0;
>> }
>>
>> I think we should also do this operation under the lock.
>>
>> Please cc Ryan Chen <ryan_chen@aspeedtech.com> so he can confirm that
>> this workaround is valid, and credit Lei who spent a lot of time
>> investigating this issue. Perhaps "Root-caused-by".
>>
>
> The code has aspeed_clk_is_enabled() already, why not just:
>
> if (aspeed_clk_is_enabled(hw))
> return 0;

Good suggestion.

We should also fix up aspeed_clk_is_enabled() for clocks that have
CLK_GATE_SET_TO_DISABLE set.

Cheers,

Joel

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