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    Subject[PATCH AUTOSEL for 4.9 099/219] ARM: dts: r8a7793: Correct parent of SSI[0-9] clocks
    Date
    From: Geert Uytterhoeven <geert+renesas@glider.be>

    [ Upstream commit 1cd9028027c7a7c10b774df698c3cfafec6aa67d ]

    The SSI-ALL gate clock is located in between the P clock and the
    individual SSI[0-9] clocks, hence the former should be listed as their
    parent.

    Fixes: 072d326542e49187 ("ARM: dts: r8a7793: add MSTP10 clocks to device tree")
    Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
    Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
    Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
    ---
    arch/arm/boot/dts/r8a7793.dtsi | 7 +++++--
    1 file changed, 5 insertions(+), 2 deletions(-)

    diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
    index bd7ee309f509..e9625cb3bbaa 100644
    --- a/arch/arm/boot/dts/r8a7793.dtsi
    +++ b/arch/arm/boot/dts/r8a7793.dtsi
    @@ -1234,8 +1234,11 @@
    compatible = "renesas,r8a7793-mstp-clocks", "renesas,cpg-mstp-clocks";
    reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
    clocks = <&p_clk>,
    - <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
    - <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
    + <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI_ALL>,
    + <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI_ALL>,
    + <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI_ALL>,
    + <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI_ALL>,
    + <&mstp10_clks R8A7793_CLK_SSI_ALL>, <&mstp10_clks R8A7793_CLK_SSI_ALL>,
    <&p_clk>,
    <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
    <&mstp10_clks R8A7793_CLK_SCU_ALL>, <&mstp10_clks R8A7793_CLK_SCU_ALL>,
    --
    2.14.1
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