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SubjectRe: [PATCH 4/4] sched/fair: Use a recently used CPU as an idle candidate and the basis for SIS
On Sat, Feb 03, 2018 at 08:30:48AM -0800, Srinivas Pandruvada wrote:
> On Fri, 2018-02-02 at 15:08 +0100, Peter Zijlstra wrote:
> > On Fri, Feb 02, 2018 at 01:46:47PM +0100, Peter Zijlstra wrote:
> >
> > > +static void __intel_pstate_hwp_set_desired(int val)
> > > +{
> > > + u64 value;
> > > +
> > > + value = rdmsrl(MSR_HWP_REQUEST);
> > > + value &= ~GENMASK_ULL(23, 16);
> > > + value |= (val & 0xff) << 16;
> > > + wrmsrl(MSR_HWP_REQUEST, val);
> > > +}
> >
> > Also, if we keep a software shadow of that MSR, we can avoid the
> > rdmsr, which might also help.
> The reason we don't keep a software shadow as users can use x86-energy-
> perf utility or via BMC to adjust. CCed to Len.

Total NAK on that. People using /dev/msr to prod at state get to keep
whatever pieces they end up with.

We _really_ should make /dev/msr taint the kernel on write. Ingo,
Thomas, can we pretty please just do that?

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