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Subject[PATCH 06/11] clk: meson: add ROUND_CLOSEST to the pll driver
Date
Provide an option for the pll driver to round to the rate closest to the
requested rate, instead of systematically rounding down.

This may allow the provided rate to be closer to the requested rate when
rounding up is not an issue

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
drivers/clk/meson/clk-pll.c | 17 +++++++++++++----
drivers/clk/meson/clkc.h | 2 ++
2 files changed, 15 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c
index d58961f35b71..65a7bd903551 100644
--- a/drivers/clk/meson/clk-pll.c
+++ b/drivers/clk/meson/clk-pll.c
@@ -105,7 +105,12 @@ static u16 __pll_params_with_frac(unsigned long rate,
u64 val = (u64)rate * pllt->n;

val <<= pllt->od + pllt->od2 + pllt->od3;
- val = div_u64(val * frac_max, parent_rate);
+
+ if (pll->flags & CLK_MESON_PLL_ROUND_CLOSEST)
+ val = DIV_ROUND_CLOSEST_ULL(val * frac_max, parent_rate);
+ else
+ val = div_u64(val * frac_max, parent_rate);
+
val -= pllt->m * frac_max;

return min((u16)val, (u16)(frac_max - 1));
@@ -125,9 +130,13 @@ meson_clk_get_pll_settings(unsigned long rate,
while (table[i].rate && table[i].rate <= rate)
i++;

- /* Select the setting of the rounded down rate */
- if (i != 0)
- i--;
+ if (i != 0) {
+ if (MESON_PARM_APPLICABLE(&pll->frac) ||
+ !(pll->flags & CLK_MESON_PLL_ROUND_CLOSEST) ||
+ (abs(rate - table[i - 1].rate) <
+ abs(rate - table[i].rate)))
+ i--;
+ }

return (struct pll_rate_table *)&table[i];
}
diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h
index 9cdcd9b6c16c..8fe73c4edca8 100644
--- a/drivers/clk/meson/clkc.h
+++ b/drivers/clk/meson/clkc.h
@@ -71,6 +71,8 @@ struct pll_rate_table {
.od = (_od), \
}

+#define CLK_MESON_PLL_ROUND_CLOSEST BIT(0)
+
struct meson_clk_pll_data {
struct parm m;
struct parm n;
--
2.14.3
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