lkml.org 
[lkml]   [2018]   [Feb]   [14]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
SubjectRe: [PATCH v3 1/2] net: phy: dp83867: Add binding for the CLK_OUT pin muxing option
From
From: Daniel Schultz <d.schultz@phytec.de>
Date: Wed, 14 Feb 2018 17:07:11 +0100

> From: Wadim Egorov <w.egorov@phytec.de>
>
> The DP83867 has a muxing option for the CLK_OUT pin. It is possible
> to set CLK_OUT for different channels.
> Create a binding to select a specific clock for CLK_OUT pin.
>
> Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
> Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
> ---
> Changes:
> v2:
> Added check if clk_output_sel has a valid value
> Only write the clock ouput register if a musing is desired
> v3:
> -

Applied to net-next.

\
 
 \ /
  Last update: 2018-02-14 21:35    [W:1.842 / U:0.236 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site