| Date | Wed, 14 Feb 2018 16:38:39 +0000 | From | James Hogan <> | Subject | Re: [PATCH v3 1/8] dt-bindings: mips: Add bindings for Microsemi SoCs |
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On Tue, Jan 16, 2018 at 11:12:33AM +0100, Alexandre Belloni wrote: > +o CPU system control: > + > +The SoC has a few registers (ICPU_CFG:CPU_SYSTEM_CTRL) handling configuration of > +the CPU: 8 general purpose registers, reset control, CPU en/disabling, CPU > +endianess, CPU bus control, CPU status.
nit: checkpatch suggests endianess should be spelt endianness
Cheers James [unhandled content-type:application/pgp-signature] |