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    Subject[PATCH 3.16 295/328] MIPS: memset: Fix CPU_DADDI_WORKAROUNDS `small_fixup' regression
    3.16.62-rc1 review patch.  If anyone has any objections, please let me know.

    ------------------

    From: "Maciej W. Rozycki" <macro@linux-mips.org>

    commit 148b9aba99e0bbadf361747d21456e1589015f74 upstream.

    Fix a commit 8a8158c85e1e ("MIPS: memset.S: EVA & fault support for
    small_memset") regression and remove assembly warnings:

    arch/mips/lib/memset.S: Assembler messages:
    arch/mips/lib/memset.S:243: Warning: Macro instruction expanded into multiple instructions in a branch delay slot

    triggering with the CPU_DADDI_WORKAROUNDS option set and this code:

    PTR_SUBU a2, t1, a0
    jr ra
    PTR_ADDIU a2, 1

    This is because with that option in place the DADDIU instruction, which
    the PTR_ADDIU CPP macro expands to, becomes a GAS macro, which in turn
    expands to an LI/DADDU (or actually ADDIU/DADDU) sequence:

    13c: 01a4302f dsubu a2,t1,a0
    140: 03e00008 jr ra
    144: 24010001 li at,1
    148: 00c1302d daddu a2,a2,at
    ...

    Correct this by switching off the `noreorder' assembly mode and letting
    GAS schedule this jump's delay slot, as there is nothing special about
    it that would require manual scheduling. With this change in place
    correct code is produced:

    13c: 01a4302f dsubu a2,t1,a0
    140: 24010001 li at,1
    144: 03e00008 jr ra
    148: 00c1302d daddu a2,a2,at
    ...

    Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
    Signed-off-by: Paul Burton <paul.burton@mips.com>
    Fixes: 8a8158c85e1e ("MIPS: memset.S: EVA & fault support for small_memset")
    Patchwork: https://patchwork.linux-mips.org/patch/20833/
    Cc: Ralf Baechle <ralf@linux-mips.org>
    [bwh: Backported to 3.16: adjust context]
    Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
    ---
    arch/mips/lib/memset.S | 4 +++-
    1 file changed, 3 insertions(+), 1 deletion(-)

    --- a/arch/mips/lib/memset.S
    +++ b/arch/mips/lib/memset.S
    @@ -213,9 +213,11 @@
    nop

    .Lsmall_fixup\@:
    + .set reorder
    PTR_SUBU a2, t1, a0
    + PTR_ADDIU a2, 1
    jr ra
    - PTR_ADDIU a2, 1
    + .set noreorder

    .endm

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