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    SubjectRe: [PATCH 2/2] staging: iio: adc: ad7192: Add clock output option
    On Thu, 6 Dec 2018 11:10:52 +0200
    Mircea Caprioru <mircea.caprioru@analog.com> wrote:

    > When using the internal clock the device has an option in which the clock
    > output is available on MCLK2 pin. This patch adds a dt binding for enabling
    > this property.
    >
    > Signed-off-by: Mircea Caprioru <mircea.caprioru@analog.com>
    I'd rather we looked at getting this out of staging, with proper binding
    docs before we add too many new features, but I suppose this is small
    enough that it isn't too much of a problem other that we are defining
    a binding that might not go down well long term.

    If nothing else we should be supporting this as a clock source
    to allow it for example to be looped into another identical device
    as the input.

    Here we are putting it out on a pin with no 'consumers'.

    Jonathan


    > ---
    > drivers/staging/iio/adc/ad7192.c | 9 ++++++++-
    > 1 file changed, 8 insertions(+), 1 deletion(-)
    >
    > diff --git a/drivers/staging/iio/adc/ad7192.c b/drivers/staging/iio/adc/ad7192.c
    > index 8a4e6ede42b3..a11c8a82bb7c 100644
    > --- a/drivers/staging/iio/adc/ad7192.c
    > +++ b/drivers/staging/iio/adc/ad7192.c
    > @@ -611,6 +611,10 @@ static const struct iio_chan_spec ad7193_channels[] = {
    > static int ad7192_clock_select(struct spi_device *spi, struct ad7192_state *st)
    > {
    > int ret;
    > + bool clock_out_en;
    > +
    > + clock_out_en = of_property_read_bool(spi->dev.of_node,
    > + "adi,int-clock-output-enable");
    >
    > st->clock_sel = AD7192_CLK_EXT_MCLK2;
    > st->mclk = devm_clk_get(&spi->dev, "clk");
    > @@ -626,7 +630,10 @@ static int ad7192_clock_select(struct spi_device *spi, struct ad7192_state *st)
    > return PTR_ERR(st->mclk);
    >
    > /* use internal clock */
    > - st->clock_sel = AD7192_CLK_INT;
    > + if (!clock_out_en)
    > + st->clock_sel = AD7192_CLK_INT;
    > + else
    > + st->clock_sel = AD7192_CLK_INT_CO;
    > st->fclk = AD7192_INT_FREQ_MHZ;
    > }
    > }

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