Messages in this thread | | | Date | Fri, 7 Dec 2018 12:35:57 -0800 | From | Sean Christopherson <> | Subject | Re: [RFC PATCH v2 4/4] x86/vdso: Add __vdso_sgx_enter_enclave() to wrap SGX enclave transitions |
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On Fri, Dec 07, 2018 at 12:16:59PM -0800, Andy Lutomirski wrote: > > > On Dec 7, 2018, at 12:09 PM, Sean Christopherson <sean.j.christopherson@intel.com> wrote: > > > > Speaking of preserving registers, the asm blob needs to mark RBX as > > clobbered since it's modified for EEXIT. > > Have fun with that. The x86_32 compiler seems to really like having its > PIC register preserved, and you may get some lovely compiler errors.
Tagentinally related, as-is the SGX vDSO is only compiled for x86_64 since CONFIG_SGX depends on CONFIG_X86_64. Mapping the EPC in 32-bit mode complicates things and no one is asking for SGX support on 32-bit builds, so...
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