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Subject[PATCH v2 2/3] arm64: dts: allwinner: a64: Add A64 CSI controller
Date
Allwinner A64 CSI controller has similar features as like in
H3, So add support for A64 via H3 fallback.

Also updated CSI_SCLK to use 300MHz via assigned-clocks, since
the default clock 600MHz seems unable to drive the sensor(ov5640)
to capture the image.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
Changes for v2:
- Use CSI_SCLK to 300MHz

arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 384c417cb7a2..d7ab0006ebce 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -532,6 +532,12 @@
interrupt-controller;
#interrupt-cells = <3>;

+ csi_pins: csi-pins {
+ pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6",
+ "PE7", "PE8", "PE9", "PE10", "PE11";
+ function = "csi0";
+ };
+
i2c0_pins: i2c0_pins {
pins = "PH0", "PH1";
function = "i2c0";
@@ -899,6 +905,23 @@
status = "disabled";
};

+ csi: csi@1cb0000 {
+ compatible = "allwinner,sun50i-a64-csi",
+ "allwinner,sun8i-h3-csi";
+ reg = <0x01cb0000 0x1000>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CSI>,
+ <&ccu CLK_CSI_SCLK>,
+ <&ccu CLK_DRAM_CSI>;
+ clock-names = "bus", "mod", "ram";
+ resets = <&ccu RST_BUS_CSI>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&csi_pins>;
+ assigned-clocks = <&ccu CLK_CSI_SCLK>;
+ assigned-clock-rates = <300000000>;
+ status = "disabled";
+ };
+
hdmi: hdmi@1ee0000 {
compatible = "allwinner,sun50i-a64-dw-hdmi",
"allwinner,sun8i-a83t-dw-hdmi";
--
2.18.0.321.gffc6fa0e3
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