Messages in this thread | | | Date | Thu, 6 Dec 2018 15:56:10 -0800 | From | Bjorn Andersson <> | Subject | Re: [PATCH v2 2/3] arm64: dts: qcom: sdm845: Add SD node |
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On Thu 06 Dec 10:45 PST 2018, Evan Green wrote:
> Add one of the two SD controllers to SDM845. > > Signed-off-by: Evan Green <evgreen@chromium.org> > Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Regards, Bjorn
> --- > > Changes in v2: > - Reworded commit message to note that there are multiple SD > controllers. > > arch/arm64/boot/dts/qcom/sdm845.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index 1419b0098cb38..bb8eacdf40910 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -1078,6 +1078,21 @@ > }; > }; > > + sdhc_2: sdhci@8804000 { > + compatible = "qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"; > + reg = <0x8804000 0x1000>; > + > + interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "hc_irq", "pwr_irq"; > + > + clocks = <&gcc GCC_SDCC2_AHB_CLK>, > + <&gcc GCC_SDCC2_APPS_CLK>; > + clock-names = "iface", "core"; > + > + status = "disabled"; > + }; > + > usb_1_hsphy: phy@88e2000 { > compatible = "qcom,sdm845-qusb2-phy"; > reg = <0x88e2000 0x400>; > -- > 2.18.1 >
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