Messages in this thread | | | Subject | Re: [PATCH v3 4/4] ARM: dts: imx5: add gpu nodes | From | Jonathan marek <> | Date | Mon, 3 Dec 2018 17:21:40 -0500 |
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On 12/03/2018 05:16 PM, Fabio Estevam wrote: > Hi Jonathan, > > Thanks for working on this. Really nice to see GPU support for mx51/mx53! > > On Mon, Dec 3, 2018 at 7:21 PM Jonathan Marek <jonathan@marek.ca> wrote: > > Please add a commit log. > >> Signed-off-by: Jonathan Marek <jonathan@marek.ca> > >> --- >> arch/arm/boot/dts/imx51.dtsi | 17 +++++++++++++++++ >> arch/arm/boot/dts/imx53.dtsi | 17 +++++++++++++++++ >> 2 files changed, 34 insertions(+) >> >> diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi >> index 67d462715..e9a7bbce9 100644 >> --- a/arch/arm/boot/dts/imx51.dtsi >> +++ b/arch/arm/boot/dts/imx51.dtsi >> @@ -628,5 +628,22 @@ >> clock-names = "ipg", "ahb"; >> }; >> }; >> + >> + gpu: gpu@30000000 { > > We put the peripheral nodes in address order, so this one should go > prior to the IPU node. > >> + compatible = "amd,imageon-200.1", "amd,imageon"; > > I can't find the dt-bindings for these compatible entries. Have you > documented them? >
It is the same as qcom,adreno which is documented here:
Documentation/devicetree/bindings/display/msm/gpu.txt
I guess I should add amd,imageon there.
>> + reg = <0x30000000 0x20000>; >> + reg-names = "kgsl_3d0_reg_memory"; >> + interrupts = <12>; >> + interrupt-names = "kgsl_3d0_irq"; >> + clocks = <&clks IMX5_CLK_GPU3D_GATE>, <&clks IMX5_CLK_GARB_GATE>; >> + clock-names = "core_clk", "mem_iface_clk"; >> + >> + qcom,gpu-pwrlevels { >> + compatible = "qcom,gpu-pwrlevels"; >> + qcom,gpu-pwrlevel@0 { > > You could drop this @0 >
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