Messages in this thread Patch in this message | | | From | Jorge Ramirez-Ortiz <> | Subject | [PATCH 07/13] clk: qcom: hfpll: register as clock provider | Date | Mon, 17 Dec 2018 10:46:24 +0100 |
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Make the output of the high frequency pll a clock provider. On the QCS404 this PLL controls cpu frequency scaling.
Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> --- drivers/clk/qcom/hfpll.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c index 87b7f46..0ffed0d 100644 --- a/drivers/clk/qcom/hfpll.c +++ b/drivers/clk/qcom/hfpll.c @@ -53,6 +53,7 @@ static int qcom_hfpll_probe(struct platform_device *pdev) struct regmap *regmap; struct clk_hfpll *h; struct clk *pclk; + int ret; struct clk_init_data init = { .parent_names = (const char *[]){ "xo" }, .num_parents = 1, @@ -87,7 +88,14 @@ static int qcom_hfpll_probe(struct platform_device *pdev) h->clkr.hw.init = &init; spin_lock_init(&h->lock); - return devm_clk_register_regmap(&pdev->dev, &h->clkr); + ret = devm_clk_register_regmap(dev, &h->clkr); + if (ret) { + dev_err(dev, "failed to register regmap clock: %d\n", ret); + return ret; + } + + return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, + &h->clkr.hw); } static struct platform_driver qcom_hfpll_driver = { -- 2.7.4
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