Messages in this thread | | | From | Naga Sureshkumar Relli <> | Subject | RE: [LINUX PATCH v12 3/3] mtd: rawnand: arasan: Add support for Arasan NAND Flash Controller | Date | Wed, 12 Dec 2018 13:07:42 +0000 |
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Hi Miquel,
> -----Original Message----- > From: Miquel Raynal [mailto:miquel.raynal@bootlin.com] > Sent: Wednesday, December 12, 2018 2:40 PM > To: Naga Sureshkumar Relli <nagasure@xilinx.com> > Cc: Boris Brezillon <boris.brezillon@bootlin.com>; robh@kernel.org; richard@nod.at; linux- > kernel@vger.kernel.org; marek.vasut@gmail.com; linux-mtd@lists.infradead.org; > nagasuresh12@gmail.com; Michal Simek <michals@xilinx.com>; > computersforpeace@gmail.com; dwmw2@infradead.org > Subject: Re: [LINUX PATCH v12 3/3] mtd: rawnand: arasan: Add support for Arasan > NAND Flash Controller > > Hi Naga, > > Naga Sureshkumar Relli <nagasure@xilinx.com> wrote on Wed, 12 Dec 2018 > 09:04:16 +0000: > > > Hi Miquel, > > > > > -----Original Message----- > > > From: Miquel Raynal [mailto:miquel.raynal@bootlin.com] > > > Sent: Wednesday, December 12, 2018 1:42 PM > > > To: Naga Sureshkumar Relli <nagasure@xilinx.com> > > > Cc: Boris Brezillon <boris.brezillon@bootlin.com>; robh@kernel.org; > > > richard@nod.at; linux- kernel@vger.kernel.org; > > > marek.vasut@gmail.com; linux-mtd@lists.infradead.org; > > > nagasuresh12@gmail.com; Michal Simek <michals@xilinx.com>; > > > computersforpeace@gmail.com; dwmw2@infradead.org > > > Subject: Re: [LINUX PATCH v12 3/3] mtd: rawnand: arasan: Add support > > > for Arasan NAND Flash Controller > > > > > > Hi Naga, > > > > > > Naga Sureshkumar Relli <nagasure@xilinx.com> wrote on Wed, 12 Dec > > > 2018 > > > 05:27:03 +0000: > > > > > > > Hi Boris & Miquel, > > > > > > > > An update to my comments on thread https://lkml.org/lkml/2018/11/15/656. > > > > In this I said, will take a default error count value as 16 and > > > > during page read, will check the error count Register value with > > > > this and if it is equal to or greater than the default count(16) then I am checking for > Erased pages. > > > > But bit[7:0] in ECC_Error_Count_Register(0x38) will update for each error occurred. > > > > Link: > > > > https://www.xilinx.com/html_docs/registers/ug1087/ug1087-zynq-ultr > > > > ascale- > > > registers.html and check for NAND module, ECC_Error_Count_Register. > > > > > > > > I mean previously I dependent on Total error count value > > > > (bit[16:8]), but we can simply check for bit[7:0] To see the error occurred or not. > > > > I tried with this approach and I don't see any issues with that. > > > > I ran ubifs with this and I am able to see the bit[7:0] count is > > > > updated for erased page read and then will Use > > > > nand_chech_erased_ecc_chunk() to see the > > > bitflips. > > > > > > > > If it is ok, I will update the driver and will send new patch, but > > > > do you have any other > > > comments on v12? > > > > > > Is 'nandbiterrs -i' running correctly now? > > Yes, but with some changes in driver. > > I have added the log and changes done in https://lkml.org/lkml/2018/11/23/705. > > No, I don't see a working nandbiterrs there, sorry. The log that I have attached is from mtd_nandbiterrs test So as per ARASAN controller ECC mechanism, it will correct upto 24-bit. After that the test will fail.
I am running mtd-utils nandbiterr test now. Will let you know once I completed that.
Thanks, Naga Sureshkumar Relli > > > Thanks, > Miquèl
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