Quoting Anson Huang (2018-11-29 22:31:40)> On i.MX6QP/i.MX6Q/i.MX6DL, there are DCIC1/DCIC2 clocks> gate in CCM_CCGR0 register, add them into clock tree for> clock management.> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>> ---Applied to clk-next