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    Subject[PATCH 16/52] virtio-fs: Add VIRTIO_PCI_CAP_SHARED_MEMORY_CFG and utility to find them
    Date
    From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>

    The shm cap defines a capability to allow 64bit size chunks at 64 bit
    size offsets into a bar. There can be multiple such chunks on any one
    device.

    Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
    ---
    fs/fuse/virtio_fs.c | 69 +++++++++++++++++++++++++++++++++++++++++
    include/uapi/linux/virtio_pci.h | 10 ++++++
    2 files changed, 79 insertions(+)

    diff --git a/fs/fuse/virtio_fs.c b/fs/fuse/virtio_fs.c
    index 87b7e42a6763..cd916943205e 100644
    --- a/fs/fuse/virtio_fs.c
    +++ b/fs/fuse/virtio_fs.c
    @@ -11,6 +11,7 @@
    #include <linux/module.h>
    #include <linux/virtio.h>
    #include <linux/virtio_fs.h>
    +#include <uapi/linux/virtio_pci.h>
    #include "fuse_i.h"

    enum {
    @@ -57,6 +58,74 @@ struct virtio_fs {
    size_t window_len;
    };

    +/* TODO: This should be in a PCI file somewhere */
    +static int virtio_pci_find_shm_cap(struct pci_dev *dev,
    + u8 required_id,
    + u8 *bar, u64 *offset, u64 *len)
    +{
    + int pos;
    +
    + for (pos = pci_find_capability(dev, PCI_CAP_ID_VNDR);
    + pos > 0;
    + pos = pci_find_next_capability(dev, pos, PCI_CAP_ID_VNDR)) {
    + u8 type, cap_len, id;
    + u32 tmp32;
    + u64 res_offset, res_length;
    +
    + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap,
    + cfg_type),
    + &type);
    + if (type != VIRTIO_PCI_CAP_SHARED_MEMORY_CFG)
    + continue;
    +
    + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap,
    + cap_len),
    + &cap_len);
    + if (cap_len != sizeof(struct virtio_pci_shm_cap)) {
    + printk(KERN_ERR "%s: shm cap with bad size offset: %d size: %d\n",
    + __func__, pos, cap_len);
    + continue;
    + };
    +
    + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_shm_cap,
    + id),
    + &id);
    + if (id != required_id)
    + continue;
    +
    + /* Type, and ID match, looks good */
    + pci_read_config_byte(dev, pos + offsetof(struct virtio_pci_cap,
    + bar),
    + bar);
    +
    + /* Read the lower 32bit of length and offset */
    + pci_read_config_dword(dev, pos + offsetof(struct virtio_pci_cap, offset),
    + &tmp32);
    + res_offset = tmp32;
    + pci_read_config_dword(dev, pos + offsetof(struct virtio_pci_cap, length),
    + &tmp32);
    + res_length = tmp32;
    +
    + /* and now the top half */
    + pci_read_config_dword(dev,
    + pos + offsetof(struct virtio_pci_shm_cap,
    + offset_hi),
    + &tmp32);
    + res_offset |= ((u64)tmp32) << 32;
    + pci_read_config_dword(dev,
    + pos + offsetof(struct virtio_pci_shm_cap,
    + length_hi),
    + &tmp32);
    + res_length |= ((u64)tmp32) << 32;
    +
    + *offset = res_offset;
    + *len = res_length;
    +
    + return pos;
    + }
    + return 0;
    +}
    +
    static inline struct virtio_fs_vq *vq_to_fsvq(struct virtqueue *vq)
    {
    struct virtio_fs *fs = vq->vdev->priv;
    diff --git a/include/uapi/linux/virtio_pci.h b/include/uapi/linux/virtio_pci.h
    index 90007a1abcab..2e6072b5a7c9 100644
    --- a/include/uapi/linux/virtio_pci.h
    +++ b/include/uapi/linux/virtio_pci.h
    @@ -113,6 +113,8 @@
    #define VIRTIO_PCI_CAP_DEVICE_CFG 4
    /* PCI configuration access */
    #define VIRTIO_PCI_CAP_PCI_CFG 5
    +/* Additional shared memory capability */
    +#define VIRTIO_PCI_CAP_SHARED_MEMORY_CFG 8

    /* This is the PCI capability header: */
    struct virtio_pci_cap {
    @@ -163,6 +165,14 @@ struct virtio_pci_cfg_cap {
    __u8 pci_cfg_data[4]; /* Data for BAR access. */
    };

    +/* Fields in VIRTIO_PCI_CAP_SHARED_MEMORY_CFG */
    +struct virtio_pci_shm_cap {
    + struct virtio_pci_cap cap;
    + __le32 offset_hi; /* Most sig 32 bits of offset */
    + __le32 length_hi; /* Most sig 32 bits of length */
    + __u8 id; /* To distinguish shm chunks */
    +};
    +
    /* Macro versions of offsets for the Old Timers! */
    #define VIRTIO_PCI_CAP_VNDR 0
    #define VIRTIO_PCI_CAP_NEXT 1
    --
    2.13.6
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