lkml.org 
[lkml]   [2018]   [Nov]   [29]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH] armv8: GPIO: enable port input and interrupt
Date
From: Zhang Ying-22455 <ying.zhang22455@nxp.com>

The GPIO Input Buffer Enable register is used to control the input
enable of each individual GPIO port. When an individual GPIO port’s
direction is set to input (GPIO_GPDIR[DRn=0]), the associated input
enable must be set (GPIOxGPIE[IEn]=1) to propagate the port value to
the GPIO Data Register.

This patch enable port input and interrupt.

Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
---
drivers/gpio/gpio-mpc8xxx.c | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c
index 793518a..f97cd23 100644
--- a/drivers/gpio/gpio-mpc8xxx.c
+++ b/drivers/gpio/gpio-mpc8xxx.c
@@ -362,9 +362,10 @@ static int mpc8xxx_probe(struct platform_device *pdev)
if (!mpc8xxx_gc->irq)
return 0;

- /* ack and mask all irqs */
+ /* ack and enable irqs */
gc->write_reg(mpc8xxx_gc->regs + GPIO_IER, 0xffffffff);
- gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, 0);
+ gc->write_reg(mpc8xxx_gc->regs + GPIO_IMR, 0xffffffff);
+ gc->write_reg(mpc8xxx_gc->regs + GPIO_ICR2, 0xffffffff);

irq_set_chained_handler_and_data(mpc8xxx_gc->irqn,
mpc8xxx_gpio_irq_cascade, mpc8xxx_gc);
--
1.7.1
\
 
 \ /
  Last update: 2018-11-29 09:56    [W:0.071 / U:0.244 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site