Messages in this thread | | | From | Anand Moon <> | Date | Mon, 26 Nov 2018 14:19:07 +0530 | Subject | Re: [PATCH 3/3] ARM: dts: Add g3d bus nodes using VDD_INT for Exynos542x SoC |
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Hi Chanwoo,
On Mon, 26 Nov 2018 at 13:08, Chanwoo Choi <cw00.choi@samsung.com> wrote: > > Hi Anand, > > CLK_DOUT_ACLK_G3D is the clock for GPU h/w and it requires the buck4_reg("vdd_g3d"). > > bus_wcore uses the buck3_reg("vdd_int"). bus_wcore and bus_g3d don't share the > same voltage line. It is wrong to make 'bus_g3d' as the child of 'bus_wcore' > because of using the different regulator. > > CLK_DOUT_ACLK_G3D and buck4_reg should be controlled from MALI driver > with DEVFREQ framework. Unfortunately, MALI driver is not posted to mainline. > >
Thanks for your clarification, I missed this point. mali gpu is linked to buck4_reg Next time I will ask for the expert how to proceed on some changes.
Best Regards -Anand
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