Messages in this thread | | | Date | Mon, 26 Nov 2018 09:23:10 +0800 | From | Vincent Chen <> | Subject | Re: [PATCH v4 2/5] nds32: Support FP emulation |
| |
On Fri, Nov 23, 2018 at 06:53:37PM +0800, David Laight wrote: > From: Vincent Chen > > Sent: 22 November 2018 03:15 > > > > The Andes FPU coprocessor does not support denormalized number handling. > > According to the specification, FPU generates a denorm input exception > > that requires the kernel to deal with this instrution operation when it > > encounters denormalized operands. Hence an nds32 FPU ISA emulator in the > > kernel is required to meet requirement. > > What does the FPU generate for results near zero?
1. The calculation result is a denormalized number Depending on the state of underflow trap, the FPU will raise an underflow exception or flash the result to zero.
2. One of the operands is a denormalized number Depending on the state of the flash-to-zero mode, the FPU will raise a denormalized input exception, which is a specific exception of the nds FPU, or directly treats the operand as 0.
> If it doesn't generate denormalised results (but does detect them) > then I assume it never generates FP values with exponent zero. > (So the gap around zero is even larger than it would be if exponent > zero values had a hidden bit.) > So is it really worth doing anything other than treating > denormalised values as zero? > > David >
Sorry, I can't fully understand what you mean, but we really have encountered the above two cases in some testsuites such as glibc testsuite. Hence we implement a FPU emulator in this commit which will recalculate the instructions again by software to enhance the precision. > - > Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK > Registration No: 1397386 (Wales) >
| |