lkml.org 
[lkml]   [2018]   [Nov]   [19]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 4.18 065/171] clk: sunxi-ng: h6: fix bus clocks divider position
    Date
    4.18-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Icenowy Zheng <icenowy@aosc.io>

    commit 2852bfbf4f168fec27049ad9ed20941fc9e84b95 upstream.

    The bus clocks (AHB/APB) on Allwinner H6 have their second divider start
    at bit 8, according to the user manual and the BSP code. However,
    currently the divider offset is incorrectly set to 16, thus the divider
    is not correctly read and the clock frequency is not correctly calculated.

    Fix this bit offset on all affected bus clocks in ccu-sun50i-h6.

    Cc: stable@vger.kernel.org # v4.17.y
    Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
    Signed-off-by: Chen-Yu Tsai <wens@csie.org>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 8 ++++----
    1 file changed, 4 insertions(+), 4 deletions(-)

    --- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
    +++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
    @@ -224,7 +224,7 @@ static SUNXI_CCU_MP_WITH_MUX(psi_ahb1_ah
    psi_ahb1_ahb2_parents,
    0x510,
    0, 5, /* M */
    - 16, 2, /* P */
    + 8, 2, /* P */
    24, 2, /* mux */
    0);

    @@ -233,19 +233,19 @@ static const char * const ahb3_apb1_apb2
    "pll-periph0" };
    static SUNXI_CCU_MP_WITH_MUX(ahb3_clk, "ahb3", ahb3_apb1_apb2_parents, 0x51c,
    0, 5, /* M */
    - 16, 2, /* P */
    + 8, 2, /* P */
    24, 2, /* mux */
    0);

    static SUNXI_CCU_MP_WITH_MUX(apb1_clk, "apb1", ahb3_apb1_apb2_parents, 0x520,
    0, 5, /* M */
    - 16, 2, /* P */
    + 8, 2, /* P */
    24, 2, /* mux */
    0);

    static SUNXI_CCU_MP_WITH_MUX(apb2_clk, "apb2", ahb3_apb1_apb2_parents, 0x524,
    0, 5, /* M */
    - 16, 2, /* P */
    + 8, 2, /* P */
    24, 2, /* mux */
    0);


    \
     
     \ /
      Last update: 2018-11-19 18:52    [W:4.246 / U:0.400 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site