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    SubjectRe: [PATCH v5 5/9] dt-bindings: spi: Adjust the bindings for the FSL QSPI driver
    On Tue, 13 Nov 2018 13:47:37 +0000, Schrempf Frieder wrote:
    > Adjust the documentation of the new SPI memory interface based
    > driver to reflect the new drivers settings.
    >
    > The "old" driver was using the "fsl,qspi-has-second-chip" property to
    > select one of two dual chip setups (two chips on one bus or two chips
    > on separate buses). And it used the order in which the subnodes are
    > defined in the dt to select the CS, the chip is connected to.
    >
    > Both methods are wrong and in fact the "reg" property should be used to
    > determine which bus and CS a chip is connected to. This also enables us
    > to use different setups than just single chip, or symmetric dual chip.
    >
    > So the porting of the driver from the MTD to the SPI framework actually
    > enforces the use of the "reg" properties and makes
    > "fsl,qspi-has-second-chip" superfluous.
    >
    > As all boards that have "fsl,qspi-has-second-chip" set, also have
    > correct "reg" properties, the removal of this property shouldn't lead to
    > any incompatibilities.
    >
    > The only compatibility issues I can see are with imx6sx-sdb.dts and
    > imx6sx-sdb-reva.dts, which have their reg properties set incorrectly
    > (see explanation here: [2]), all other boards should stay compatible.
    >
    > Also the "big-endian" flag was removed, as this setting is now selected
    > by the driver, depending on which SoC is in use.
    >
    > [2] https://patchwork.ozlabs.org/patch/922817/#1925445
    >
    > Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
    > ---
    > .../devicetree/bindings/spi/spi-fsl-qspi.txt | 18 ++++++++----------
    > 1 file changed, 8 insertions(+), 10 deletions(-)
    >

    Reviewed-by: Rob Herring <robh@kernel.org>

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