lkml.org 
[lkml]   [2018]   [Oct]   [25]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH v6 6/8] clk: tegra20: Turn EMC clock gate into divider
On Sun, Oct 21, 2018 at 09:30:50PM +0300, Dmitry Osipenko wrote:
> Kernel should never gate the EMC clock as it causes immediate lockup, so
> removing clk-gate functionality doesn't affect anything. Turning EMC clk
> gate into divider allows to implement glitch-less EMC scaling, avoiding
> reparenting to a backup clock.
>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
> Acked-by: Stephen Boyd <sboyd@kernel.org>
> ---
> drivers/clk/tegra/clk-tegra20.c | 36 ++++++++++++++++++++++++---------
> 1 file changed, 26 insertions(+), 10 deletions(-)

Applied to for-4.21/clk, thanks.

Thierry
[unhandled content-type:application/pgp-signature]
\
 
 \ /
  Last update: 2018-10-25 16:32    [W:0.126 / U:3.440 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site