Messages in this thread |  | | From | Vabhav Sharma <> | Subject | RE: [PATCH v4 5/6] arm64: dts: add QorIQ LX2160A SoC support | Date | Thu, 25 Oct 2018 04:19:43 +0000 |
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> -----Original Message----- > From: devicetree-owner@vger.kernel.org <devicetree-owner@vger.kernel.org> > On Behalf Of Stephen Boyd > Sent: Monday, October 15, 2018 10:19 PM > To: Shawn Guo <shawnguo@kernel.org>; Vabhav Sharma > <vabhav.sharma@nxp.com> > Cc: sudeep.holla@arm.com; oss@buserror.net; linux-kernel@vger.kernel.org; > devicetree@vger.kernel.org; robh+dt@kernel.org; mark.rutland@arm.com; > linuxppc-dev@lists.ozlabs.org; linux-arm-kernel@lists.infradead.org; > mturquette@baylibre.com; rjw@rjwysocki.net; viresh.kumar@linaro.org; > linux-clk@vger.kernel.org; linux-pm@vger.kernel.org; linux-kernel- > owner@vger.kernel.org; catalin.marinas@arm.com; will.deacon@arm.com; > gregkh@linuxfoundation.org; arnd@arndb.de; > kstewart@linuxfoundation.org; yamada.masahiro@socionext.com; Leo Li > <leoyang.li@nxp.com>; linux@armlinux.org.uk; Varun Sethi > <V.Sethi@nxp.com>; Udit Kumar <udit.kumar@nxp.com>; Pankaj Bansal > <pankaj.bansal@nxp.com>; Ramneek Mehresh > <ramneek.mehresh@nxp.com>; Ying Zhang <ying.zhang22455@nxp.com>; > Nipun Gupta <nipun.gupta@nxp.com>; Priyanka Jain > <priyanka.jain@nxp.com>; Yogesh Narayan Gaur > <yogeshnarayan.gaur@nxp.com>; Sriram Dash <sriram.dash@nxp.com> > Subject: RE: [PATCH v4 5/6] arm64: dts: add QorIQ LX2160A SoC support > > Quoting Vabhav Sharma (2018-10-14 19:58:15) > > > > + > > > > + pmu { > > > > + compatible = "arm,cortex-a72-pmu"; > > > > + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; > > > > + }; > > > > + > > > > + psci { > > > > + compatible = "arm,psci-0.2"; > > > > + method = "smc"; > > > > + }; > > > > + > > > > + memory@80000000 { > > > > + // DRAM space - 1, size : 2 GB DRAM > > > > + device_type = "memory"; > > > > + reg = <0x00000000 0x80000000 0 0x80000000>; > > > > + }; > > > > + > > > > + ddr1: memory-controller@1080000 { > > > > + compatible = "fsl,qoriq-memory-controller"; > > > > + reg = <0x0 0x1080000 0x0 0x1000>; > > > > + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; > > > > + little-endian; > > > > + }; > > > > + > > > > + ddr2: memory-controller@1090000 { > > > > + compatible = "fsl,qoriq-memory-controller"; > > > > + reg = <0x0 0x1090000 0x0 0x1000>; > > > > + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; > > > > + little-endian; > > > > + }; > > > > + > > > > + sysclk: sysclk { > > > > > > Name the node a bit generic like clock-xxx. > > There is only one clock-unit, Bootloader(U-boot) require sysclk node during > device tree fix-up as different platform support varied platform frequency as > per reset configuration word used. > > Referred other ARM based platform with one clock using name as x: x > > Please add a comment above this node with this information. Newcomers > reading this DTS file won't have any idea why this node is specially named > and a comment will help tremendously here. Sure
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