Messages in this thread | | | From | Nava kishore Manne <> | Subject | RE: [PATCH 3/3] reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller. | Date | Fri, 19 Oct 2018 09:20:58 +0000 |
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Hi Philipp
Thanks for the quicks response....
> -----Original Message----- > From: Philipp Zabel [mailto:p.zabel@pengutronix.de] > Sent: Friday, October 19, 2018 2:33 PM > To: Nava kishore Manne <navam@xilinx.com>; robh+dt@kernel.org; > mark.rutland@arm.com; Michal Simek <michals@xilinx.com>; Rajan Vaja > <RAJANV@xilinx.com>; Jolly Shah <JOLLYS@xilinx.com>; > devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux- > kernel@vger.kernel.org; chinnikishore369@gmail.com > Subject: Re: [PATCH 3/3] reset: reset-zynqmp: Adding support for Xilinx > zynqmp reset controller. > > Hi Nava, > > On Sat, 2018-10-20 at 14:11 +0530, Nava kishore Manne wrote: > > Add a reset controller driver for Xilinx Zynq UltraScale+ MPSoC. > > The zynqmp reset-controller has the ability to reset lines connected > > to different blocks and peripheral in the Soc. > > > > Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com> > > --- > > Changes for v1: > > -None. > > I had comments on RFC v3 that are not addressed yet, see below. >
Sorry, I have missed your comments . Will fix in the next version.
Regards, Navakishore.
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