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Subject[PATCH 2/3] nds32: Add 'HAVE_EFFICIENT_UNALIGNED_ACCESS' config
Date
According to my understanding, this config will optimize the code generate.
When there is an unaligned access happened, the load word instruction
still can be used if there is unaligned access support or the load byte
instruction is used. So this config need unaligned access support.

'HAVE_EFFICIENT_UNALIGNED_ACCESS' and 'HW_SUPPORT_UNALIGNMENT_ACCESS' are
default configs in nds32.

Signed-off-by: Nickhu <nickhu@andestech.com>
---
arch/nds32/Kconfig.cpu | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/nds32/Kconfig.cpu b/arch/nds32/Kconfig.cpu
index b8c8984d1456..b8eecd0cde6b 100644
--- a/arch/nds32/Kconfig.cpu
+++ b/arch/nds32/Kconfig.cpu
@@ -111,8 +111,9 @@ config ALIGNMENT_TRAP

config HW_SUPPORT_UNALIGNMENT_ACCESS
bool "Kernel support unaligned access handling by hw"
+ select HAVE_EFFICIENT_UNALIGNED_ACCESS
depends on !ALIGNMENT_TRAP
- default n
+ default y
help
Andes processors load/store world/half-word instructions can access
unaligned memory locations without generating the Data Alignment
--
2.17.0
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