Messages in this thread Patch in this message | | | From | Andy Lutomirski <> | Date | Sat, 13 Oct 2018 08:12:01 -0700 | Subject | Re: [PATCH] x86/entry/32: Fix setup of CS high bits |
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On Sat, Oct 13, 2018 at 3:02 AM Jan Kiszka <jan.kiszka@web.de> wrote: > > From: Jan Kiszka <jan.kiszka@siemens.com> > > Even if we are not on an entry stack, we have to initialize the CS high > bits because we are unconditionally evaluating them > PARANOID_EXIT_TO_KERNEL_MODE. Failing to do so broke the boot on Galileo > Gen2 and IOT2000 boards. > > Fixes: b92a165df17e ("x86/entry/32: Handle Entry from Kernel-Mode on Entry-Stack") > Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> > --- > arch/x86/entry/entry_32.S | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S > index 2767c625a52c..95c94d48ecd2 100644 > --- a/arch/x86/entry/entry_32.S > +++ b/arch/x86/entry/entry_32.S > @@ -389,6 +389,12 @@ > * that register for the time this macro runs > */ > > + /* > + * Clear unused upper bits of the dword containing the word-sized CS > + * slot in pt_regs in case hardware didn't clear it for us. > + */ > + andl $(0x0000ffff), PT_CS(%esp) > +
Please improve the comment. Since commit:
commit 385eca8f277c4c34f361a4c3a088fd876d29ae21 Author: Andy Lutomirski <luto@kernel.org> Date: Fri Jul 28 06:00:30 2017 -0700
x86/asm/32: Make pt_regs's segment registers be 16 bits
Those fields are genuinely 16 bit. So the comment should say something like "Those high bits are used for CS_FROM_ENTRY_STACK and CS_FROM_USER_CR3".
Also, can you fold something like this in:
diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S index 2767c625a52c..358eed8cf62a 100644 --- a/arch/x86/entry/entry_32.S +++ b/arch/x86/entry/entry_32.S @@ -171,7 +171,7 @@ ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI .if \no_user_check == 0 /* coming from usermode? */ - testl $SEGMENT_RPL_MASK, PT_CS(%esp) + testb $SEGMENT_RPL_MASK, PT_CS(%esp) jz .Lend_\@ .endif /* On user-cr3? */
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