Messages in this thread | | | From | Andreas Schwab <> | Subject | Re: [RFC 4/4] gpio: sifive: Add GPIO driver for SiFive SoCs | Date | Wed, 10 Oct 2018 15:28:50 +0200 |
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On Okt 10 2018, Christoph Hellwig <hch@infradead.org> wrote:
> On Wed, Oct 10, 2018 at 03:01:29PM +0200, Andreas Schwab wrote: >> On Okt 09 2018, Atish Patra <atish.patra@wdc.com> wrote: >> >> > +static void sifive_set_ie(struct sifive_gpio *chip, unsigned int offset) >> > +{ >> > + unsigned long flags; >> > + unsigned int trigger; >> > + >> > + raw_spin_lock_irqsave(&chip->lock, flags); >> > + trigger = (chip->enabled & BIT(offset)) ? chip->trigger[offset] : 0; >> >> This should use test_bit instead. > > Given that this apparently needs the spinlock for atomciy with more than > just the bitmap test_bit would be rather pointless.
BIT and test_bit/assign_bit are not compatible.
Andreas.
-- Andreas Schwab, SUSE Labs, schwab@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE 1748 E4D4 88E3 0EEA B9D7 "And now for something completely different."
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