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SubjectRe: [PATCH 0/7] IBRS patch series
On Fri, Jan 05, 2018 at 02:52:33PM +0000, Van De Ven, Arjan wrote:
> I'm sorry but your whole statement reeks a little bit of "perfect is the enemy of good"

My point is exactly that this sentences could apply to spectre
variant#2 in the first place..

If we start moving in any direction, either we reach "perfection" or
moving towards perfection and still being in "perfect is the enemy of
good" territory doesn't sound great to me.

The reptoline status with 3 way " IBRS skylake mode" or " 2way
reptoline code emission from gcc for older CPUs or CPUs without
SPEC_CTRL" plus IBRS forced still to be used around all
firmware/bios/SMM (how do you do IBRS on those CPUS without IBRS, that
requires yet another IBPB alternative combined with AMD reptoline
case) is far from a "less is more" or KISS.

This whole reptoline work is total waste for future silicon so I like
to keep it simple and obviously mathematically safe at the same
time... and also easy to activate for full math safe qemu ibrs 2 mode
without having to do a 2-way reptoline gcc code emission and dynamic
patching on qemu startup.

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