lkml.org 
[lkml]   [2018]   [Jan]   [4]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    SubjectApplied "ASoC: mediatek: add some core clocks for MT2701 AFE" to the asoc tree
    Date
    The patch

    ASoC: mediatek: add some core clocks for MT2701 AFE

    has been applied to the asoc tree at

    https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git

    All being well this means that it will be integrated into the linux-next
    tree (usually sometime in the next 24 hours) and sent to Linus during
    the next merge window (or sooner if it is a bug fix), however if
    problems are discovered then the patch may be dropped or reverted.

    You may get further e-mails resulting from automated or manual testing
    and review of the tree, please engage with people reporting problems and
    send followup patches addressing any issues that are reported if needed.

    If any updates are required or you are submitting further changes they
    should be sent as incremental updates against current git, existing
    patches will not be replaced.

    Please add any relevant lists and maintainers to the CCs when replying
    to this mail.

    Thanks,
    Mark

    From 96365d9fdb2f0d81bfc010298289a8c168931cd0 Mon Sep 17 00:00:00 2001
    From: Ryder Lee <ryder.lee@mediatek.com>
    Date: Thu, 4 Jan 2018 15:44:07 +0800
    Subject: [PATCH] ASoC: mediatek: add some core clocks for MT2701 AFE

    Add three core clocks for MT2701 AFE.

    Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
    Signed-off-by: Mark Brown <broonie@kernel.org>
    ---
    sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c | 30 ++++++++++++++++++++++-
    sound/soc/mediatek/mt2701/mt2701-afe-common.h | 3 +++
    2 files changed, 32 insertions(+), 1 deletion(-)

    diff --git a/sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c b/sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c
    index 56a057c78c9a..949fc3a1d025 100644
    --- a/sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c
    +++ b/sound/soc/mediatek/mt2701/mt2701-afe-clock-ctrl.c
    @@ -18,8 +18,11 @@
    #include "mt2701-afe-clock-ctrl.h"

    static const char *const base_clks[] = {
    + [MT2701_INFRA_SYS_AUDIO] = "infra_sys_audio_clk",
    [MT2701_TOP_AUD_MCLK_SRC0] = "top_audio_mux1_sel",
    [MT2701_TOP_AUD_MCLK_SRC1] = "top_audio_mux2_sel",
    + [MT2701_TOP_AUD_A1SYS] = "top_audio_a1sys_hp",
    + [MT2701_TOP_AUD_A2SYS] = "top_audio_a2sys_hp",
    [MT2701_AUDSYS_AFE] = "audio_afe_pd",
    [MT2701_AUDSYS_AFE_CONN] = "audio_afe_conn_pd",
    [MT2701_AUDSYS_A1SYS] = "audio_a1sys_pd",
    @@ -169,10 +172,26 @@ static int mt2701_afe_enable_audsys(struct mtk_base_afe *afe)
    struct mt2701_afe_private *afe_priv = afe->platform_priv;
    int ret;

    - ret = clk_prepare_enable(afe_priv->base_ck[MT2701_AUDSYS_AFE]);
    + /* Enable infra clock gate */
    + ret = clk_prepare_enable(afe_priv->base_ck[MT2701_INFRA_SYS_AUDIO]);
    if (ret)
    return ret;

    + /* Enable top a1sys clock gate */
    + ret = clk_prepare_enable(afe_priv->base_ck[MT2701_TOP_AUD_A1SYS]);
    + if (ret)
    + goto err_a1sys;
    +
    + /* Enable top a2sys clock gate */
    + ret = clk_prepare_enable(afe_priv->base_ck[MT2701_TOP_AUD_A2SYS]);
    + if (ret)
    + goto err_a2sys;
    +
    + /* Internal clock gates */
    + ret = clk_prepare_enable(afe_priv->base_ck[MT2701_AUDSYS_AFE]);
    + if (ret)
    + goto err_afe;
    +
    ret = clk_prepare_enable(afe_priv->base_ck[MT2701_AUDSYS_A1SYS]);
    if (ret)
    goto err_audio_a1sys;
    @@ -193,6 +212,12 @@ static int mt2701_afe_enable_audsys(struct mtk_base_afe *afe)
    clk_disable_unprepare(afe_priv->base_ck[MT2701_AUDSYS_A1SYS]);
    err_audio_a1sys:
    clk_disable_unprepare(afe_priv->base_ck[MT2701_AUDSYS_AFE]);
    +err_afe:
    + clk_disable_unprepare(afe_priv->base_ck[MT2701_TOP_AUD_A2SYS]);
    +err_a2sys:
    + clk_disable_unprepare(afe_priv->base_ck[MT2701_TOP_AUD_A1SYS]);
    +err_a1sys:
    + clk_disable_unprepare(afe_priv->base_ck[MT2701_INFRA_SYS_AUDIO]);

    return ret;
    }
    @@ -205,6 +230,9 @@ static void mt2701_afe_disable_audsys(struct mtk_base_afe *afe)
    clk_disable_unprepare(afe_priv->base_ck[MT2701_AUDSYS_A2SYS]);
    clk_disable_unprepare(afe_priv->base_ck[MT2701_AUDSYS_A1SYS]);
    clk_disable_unprepare(afe_priv->base_ck[MT2701_AUDSYS_AFE]);
    + clk_disable_unprepare(afe_priv->base_ck[MT2701_TOP_AUD_A1SYS]);
    + clk_disable_unprepare(afe_priv->base_ck[MT2701_TOP_AUD_A2SYS]);
    + clk_disable_unprepare(afe_priv->base_ck[MT2701_INFRA_SYS_AUDIO]);
    }

    int mt2701_afe_enable_clock(struct mtk_base_afe *afe)
    diff --git a/sound/soc/mediatek/mt2701/mt2701-afe-common.h b/sound/soc/mediatek/mt2701/mt2701-afe-common.h
    index 9a2b301a4c21..ae8ddeacfbfe 100644
    --- a/sound/soc/mediatek/mt2701/mt2701-afe-common.h
    +++ b/sound/soc/mediatek/mt2701/mt2701-afe-common.h
    @@ -61,8 +61,11 @@ enum {
    };

    enum audio_base_clock {
    + MT2701_INFRA_SYS_AUDIO,
    MT2701_TOP_AUD_MCLK_SRC0,
    MT2701_TOP_AUD_MCLK_SRC1,
    + MT2701_TOP_AUD_A1SYS,
    + MT2701_TOP_AUD_A2SYS,
    MT2701_AUDSYS_AFE,
    MT2701_AUDSYS_AFE_CONN,
    MT2701_AUDSYS_A1SYS,
    --
    2.15.1
    \
     
     \ /
      Last update: 2018-01-04 18:45    [W:3.357 / U:0.248 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site