lkml.org 
[lkml]   [2018]   [Jan]   [31]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
Date
From
Subjectasm-generic: Disallow no-op mb() for SMP systems

While looking through the qspinlock users, I stumbled upon openrisc and
being curious, I wanted to have a look at its memory model.

To my surprise it doesn't have asm/barrier.h. It does however support
SMP. This lead me to wonder why it would compile, turns out we provide a
no-op mb() if the architecture does not provide one.

With the obvious exception of Sequentially Consistent SMP systems, this
is terribly broken. And seeing how SC SMP is really rather unusual (and
unlikely), change the asm-generic/barrier.h to not provide this.

This _will_ break openrisc builds, they had better clarify their
position by writing their own barrier.h with a comment in.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
include/asm-generic/barrier.h | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/include/asm-generic/barrier.h b/include/asm-generic/barrier.h
index fe297b599b0a..7a10748615ff 100644
--- a/include/asm-generic/barrier.h
+++ b/include/asm-generic/barrier.h
@@ -30,9 +30,15 @@
* Fall back to compiler barriers if nothing better is provided.
*/

+#ifndef CONFIG_SMP
+/*
+ * If your SMP architecture really is Sequentially Consistent, you get
+ * barrier.h to write a nice big comment about it.
+ */
#ifndef mb
#define mb() barrier()
#endif
+#endif

#ifndef rmb
#define rmb() mb()
\
 
 \ /
  Last update: 2018-01-31 14:01    [W:0.040 / U:0.652 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site