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SubjectRe: [PATCH V6] mmc:host:sdhci-pci:Addition of Arasan PCI Controller with integrated phy.
Hi Sekhar,
Thanks please see reply below.

On Wed, Jan 3, 2018 at 1:30 AM, Sekhar Nori <> wrote:
> On Wednesday 03 January 2018 05:41 AM, Atul Garg wrote:
>> The Arasan Controller is based on a FPGA platform and has integrated phy
>> with specific registers used during initialization and
>> management of different modes. The phy and the controller are integrated
>> and registers are very specific to Arasan.
>> Arasan being an IP provider, licenses these IPs to various companies for
>> integration of IP in custom SOCs. The custom SOCs define own register
>> map depending on how bits are tied inside the SOC for phy registers,
>> depending on SOC memory plan and hence will require own platform drivers.
>> If more details on phy registers are required, an interface document is
>> hosted at https: //arasandotcom/NF/eMMC5.1 PHY Programming in Linux.pdf.
> Please fix this link (no space after : and instead of
> arasandotcom etc).

When we had the actual link some of the people emails were rejecting
including the linux lists due to being an https link when emails were
replied. Any idea so that it can be acceptable to email servers/lists
or if we were doing something wrong?

>> Signed-off-by: Atul Garg <>
> Apart from the comments given by Adrian, looks good to me.
> Reviewed-by: Sekhar Nori <>
> Regards,
> Sekhar


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