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    Subject[PATCH 4.4 18/74] PCI: layerscape: Fix MSG TLP drop setting
    Date
    4.4-stable review patch.  If anyone has any objections, please let me know.

    ------------------

    From: Minghuan Lian <Minghuan.Lian@nxp.com>

    commit 1195c103f6c98d9ff381cac3a8760d4f8a133627 upstream.

    Some kinds of Layerscape PCIe controllers will forward the received message
    TLPs to system application address space, which could corrupt system memory
    or lead to a system hang. Enable MSG_DROP to fix this issue.

    Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
    Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
    Signed-off-by: Matthias Brugger <mbrugger@suse.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

    ---
    drivers/pci/host/pci-layerscape.c | 21 +++++++++++++--------
    1 file changed, 13 insertions(+), 8 deletions(-)

    --- a/drivers/pci/host/pci-layerscape.c
    +++ b/drivers/pci/host/pci-layerscape.c
    @@ -77,6 +77,16 @@ static void ls_pcie_fix_class(struct ls_
    iowrite16(PCI_CLASS_BRIDGE_PCI, pcie->dbi + PCI_CLASS_DEVICE);
    }

    +/* Drop MSG TLP except for Vendor MSG */
    +static void ls_pcie_drop_msg_tlp(struct ls_pcie *pcie)
    +{
    + u32 val;
    +
    + val = ioread32(pcie->dbi + PCIE_STRFMR1);
    + val &= 0xDFFFFFFF;
    + iowrite32(val, pcie->dbi + PCIE_STRFMR1);
    +}
    +
    static int ls1021_pcie_link_up(struct pcie_port *pp)
    {
    u32 state;
    @@ -97,7 +107,7 @@ static int ls1021_pcie_link_up(struct pc
    static void ls1021_pcie_host_init(struct pcie_port *pp)
    {
    struct ls_pcie *pcie = to_ls_pcie(pp);
    - u32 val, index[2];
    + u32 index[2];

    pcie->scfg = syscon_regmap_lookup_by_phandle(pp->dev->of_node,
    "fsl,pcie-scfg");
    @@ -116,13 +126,7 @@ static void ls1021_pcie_host_init(struct

    dw_pcie_setup_rc(pp);

    - /*
    - * LS1021A Workaround for internal TKT228622
    - * to fix the INTx hang issue
    - */
    - val = ioread32(pcie->dbi + PCIE_STRFMR1);
    - val &= 0xffff;
    - iowrite32(val, pcie->dbi + PCIE_STRFMR1);
    + ls_pcie_drop_msg_tlp(pcie);
    }

    static int ls_pcie_link_up(struct pcie_port *pp)
    @@ -147,6 +151,7 @@ static void ls_pcie_host_init(struct pci
    iowrite32(1, pcie->dbi + PCIE_DBI_RO_WR_EN);
    ls_pcie_fix_class(pcie);
    ls_pcie_clear_multifunction(pcie);
    + ls_pcie_drop_msg_tlp(pcie);
    iowrite32(0, pcie->dbi + PCIE_DBI_RO_WR_EN);
    }


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