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SubjectRe: [PATCH v5 04/12] x86: introduce __uaccess_begin_nospec and ifence

* Dan Williams <dan.j.williams@intel.com> wrote:

> --- a/arch/x86/include/asm/uaccess.h
> +++ b/arch/x86/include/asm/uaccess.h
> @@ -124,6 +124,11 @@ extern int __get_user_bad(void);
>
> #define __uaccess_begin() stac()
> #define __uaccess_end() clac()
> +#define __uaccess_begin_nospec() \
> +({ \
> + stac(); \
> + ifence(); \
> +})

BTW., wouldn't it be better to switch the barrier order here, i.e. to do:

ifence(); \
stac(); \

?

The reason is that stac()/clac() is usually paired, so there's a chance with short
sequences that it would resolve with 'no externally visible changes to flags'.

Also, there's many cases where flags are modified _inside_ the STAC/CLAC section,
so grouping them together inside a speculation atom could be beneficial.

The flip side is that if the MFENCE stalls the STAC that is ahead of it could be
processed for 'free' - while it's always post barrier with my suggestion.

But in any case it would be nice to see a discussion of this aspect in the
changelog, even if the patch does not change.

Thanks,

Ingo

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