Messages in this thread | | | Subject | Re: [PATCH v2 5/5] x86/pti: Do not enable PTI on fixed Intel processors | From | David Woodhouse <> | Date | Wed, 24 Jan 2018 01:21:51 +0000 |
| |
On Tue, 2018-01-23 at 10:12 -0800, Andi Kleen wrote: > > - if (c->x86_vendor != X86_VENDOR_AMD) > > - setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN); > > + if (c->x86_vendor != X86_VENDOR_AMD) { > > + u64 ia32_cap = 0; > > + > > + if (cpu_has(c, X86_FEATURE_ARCH_CAPABILITIES)) > > + rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap); > > + if (!(ia32_cap & ARCH_CAP_RDCL_NO)) > > + setup_force_cpu_bug(X86_BUG_CPU_MELTDOWN); > > This means that in a hypervisor which passes through the CPUID, > but actually doesn't implement the MSR (so rdmsr #GPs and returns 0) > it would be cleared. > > It would be better to usr rdmsrl_safe and check the return value.
This particular CPUID bit exists *purely* to advertise that the IA32_ARCH_CAPABILITIES MSR exists. Nothing else. A hypervisor which tells us the MSR exists and then doesn't expose it is fairly broken. Not that it won't happen, of course.
But reading zero is fine. If the bit isn't set we do set the MELTDOWN bug flag.[unhandled content-type:application/x-pkcs7-signature] | |