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Subject[PATCH v2 0/2] clk: qcom: MISC RCG changes for SDM845
Date
Changes in v2:
* Changed usage of clk_hw_is_prepared() to __clk_is_enabled()
in clk_rcg2_shared_ops to fix build test error.

Changes in v1:
This patch series does the miscellaneous changes for RCGs
used in SDM845.

1. Clear hardware clock control bit of RCGs where HW clock
control bit is set by default so that software can control
those root clocks.
2. Introduces clk_rcg2_shared_ops to support clock controller
drivers for SDM845. With new shared ops, RCGs with shared
branches will be configured to a safe source in disable
path and actual RCG update configuration will be done in
enable path instead of doing config update in set_rate.
In set_rate(), just cache the rate instead of doing actual
configuration update. Also each RCG in clock controller
driver will have their own safe configuration frequency
table to switch to safe frequency.

Amit Nischal (2):
clk: qcom: Clear hardware clock control bit of RCG
clk: qcom: Configure the RCGs to a safe source as needed

drivers/clk/qcom/clk-rcg.h | 8 ++-
drivers/clk/qcom/clk-rcg2.c | 154 +++++++++++++++++++++++++++++++++++++++++++-
2 files changed, 159 insertions(+), 3 deletions(-)

--
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