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    Subject[PATCH 0/3] arm64: Enable work around for Cortex-A55 erratum 1024718
    Date
    Arm Cortex-A55 suffers from erratum 1024718, where update of DBM/AP bits
    without a break-before-make sequence might result in an incorrect update
    of the hardware dirty bit. The work around is to disable the DBM feature
    on the affected cores. The kernel can cope with CPUs running with and
    without the feature. So to avoid the complications of handling secondary
    CPUs brought up later (e.g, userspace) do not tie this to
    arm64_cpu_capability framework. Instead, add a check in the early CPU
    boot before we enabel the TCR bits.

    Suzuki K Poulose (3):
    arm64: Update MIDR definitions for Arm Cortex-A cores
    arm64: Add assembly helpers for MIDR range check
    arm64: Add work around for Arm Cortex-A55 Erratum 1024718

    Documentation/arm64/silicon-errata.txt | 1 +
    arch/arm64/Kconfig | 14 ++++++++++++
    arch/arm64/include/asm/assembler.h | 41 ++++++++++++++++++++++++++++++++++
    arch/arm64/include/asm/cputype.h | 4 ++++
    arch/arm64/mm/proc.S | 5 +++++
    5 files changed, 65 insertions(+)

    --
    2.13.6

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