Messages in this thread | | | From | Rob Herring <> | Date | Mon, 15 Jan 2018 11:21:24 -0600 | Subject | Re: [PATCH 5/6] arm64: tegra: Add Tegra194 chip device tree |
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On Fri, Jan 12, 2018 at 1:22 AM, Mikko Perttunen <cyndis@kapsi.fi> wrote: > On 11.01.2018 23:56, Rob Herring wrote: >> >> On Mon, Jan 08, 2018 at 06:54:37AM +0200, Mikko Perttunen wrote: >>> >>> Add the chip-level device tree, including binding headers, for the >>> NVIDIA Tegra194 "Xavier" system-on-chip. Only a small subset of devices >>> are initially available, enough to boot to UART console. >>> >>> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> >>> ---
>>> + interrupt-parent = <&gic>; >>> + #address-cells = <2>; >>> + #size-cells = <2>; >>> + >>> + uarta: serial@3100000 { >> >> >> These should all be under a bus node. Tegra failed to do this at the >> start and we're still copy-n-pasting this mistake. >> >> Then you probably don't need 2 address and size cells for all the >> peripherals. > > > So I should create one big simple-bus node and put everything with an > address apart from /memory (and maybe /sysram) inside it?
Yes. Though you can have multiple buses if that makes sense. Things like fixed clocks, gpio-leds, etc. (typically board level) that don't have any bus should stay at the top level.
Rob
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