lkml.org 
[lkml]   [2017]   [Aug]   [3]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    /
    Date
    From
    SubjectRe: [PATCH v2 02/25] mtd: nand: qcom: program NAND_DEV_CMD_VLD register
    On Wed, 19 Jul 2017 17:17:50 +0530
    Abhishek Sahu <absahu@codeaurora.org> wrote:

    > The current driver is failing without complete bootchain since
    > NAND_DEV_CMD_VLD value is not valid.
    >
    > Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>

    BTW, do you want to backport this fix? Maybe you add Fixes and
    Cc-stable tags...

    > ---
    > drivers/mtd/nand/qcom_nandc.c | 4 ++++
    > 1 file changed, 4 insertions(+)
    >
    > diff --git a/drivers/mtd/nand/qcom_nandc.c b/drivers/mtd/nand/qcom_nandc.c
    > index bc0408c..f3b995d 100644
    > --- a/drivers/mtd/nand/qcom_nandc.c
    > +++ b/drivers/mtd/nand/qcom_nandc.c
    > @@ -148,6 +148,9 @@
    > #define FETCH_ID 0xb
    > #define RESET_DEVICE 0xd
    >
    > +/* Value for NAND_DEV_CMD_VLD */
    > +#define NAND_DEV_CMD_VLD_VAL 0x1d
    > +
    > /*
    > * the NAND controller performs reads/writes with ECC in 516 byte chunks.
    > * the driver calls the chunks 'step' or 'codeword' interchangeably
    > @@ -1972,6 +1975,7 @@ static int qcom_nandc_setup(struct qcom_nand_controller *nandc)
    > {
    > /* kill onenand */
    > nandc_write(nandc, SFLASHC_BURST_CFG, 0);
    > + nandc_write(nandc, NAND_DEV_CMD_VLD, NAND_DEV_CMD_VLD_VAL);
    >
    > /* enable ADM DMA */
    > nandc_write(nandc, NAND_FLASH_CHIP_SELECT, DM_EN);

    \
     
     \ /
      Last update: 2017-08-03 17:49    [W:4.088 / U:0.164 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site