Messages in this thread | | | Date | Tue, 22 Aug 2017 19:07:36 +0200 | From | Peter Zijlstra <> | Subject | Re: [PATCH V5] perf: Add PERF_SAMPLE_PHYS_ADDR |
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On Thu, Aug 17, 2017 at 02:17:23PM -0400, kan.liang@intel.com wrote: > diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c > index a322fed..f0e8d9c 100644 > --- a/arch/x86/events/intel/ds.c > +++ b/arch/x86/events/intel/ds.c > @@ -1065,6 +1065,35 @@ static inline u64 intel_hsw_transaction(struct pebs_record_skl *pebs) > return txn; > } > > +static u64 dla_to_phys(u64 dla) > +{ > + u64 phys_addr = 0; > + struct page *p = NULL; > + > + if (dla >= TASK_SIZE) { > + /* If it's vmalloc()d memory, leave phys_addr as 0 */ > + if (virt_addr_valid(dla) && > + !(dla >= VMALLOC_START && dla < VMALLOC_END)) > + phys_addr = (u64)virt_to_phys((void *)(uintptr_t)dla); > + } else { > + /* > + * Walking the pages tables for user address. > + * Interrupts are disabled, so it prevents any tear down > + * of the page tables. > + * Try IRQ-safe __get_user_pages_fast first. > + * If failed, leave phys_addr as 0. > + */ > + if ((current->mm != NULL) && > + (__get_user_pages_fast(dla, 1, 0, &p) == 1)) > + phys_addr = page_to_phys(p) + dla % PAGE_SIZE; > + > + if (p) > + put_page(p); > + } > + > + return phys_addr; > +}
Is this in any way x86 specific? AFAICT this should work in generic code as long as data->addr is provided.
> static void setup_pebs_sample_data(struct perf_event *event, > struct pt_regs *iregs, void *__pebs, > struct perf_sample_data *data, > @@ -1179,6 +1208,9 @@ static void setup_pebs_sample_data(struct perf_event *event, > x86_pmu.intel_cap.pebs_format >= 1) > data->addr = pebs->dla; > > + if ((sample_type & PERF_SAMPLE_PHYS_ADDR) && (data->addr != 0)) > + data->phys_addr = dla_to_phys(data->addr); > + > if (x86_pmu.intel_cap.pebs_format >= 2) { > /* Only set the TSX weight when no memory weight. */ > if ((sample_type & PERF_SAMPLE_WEIGHT) && !fll)
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