Messages in this thread | | | Subject | Re: [PATCH 2/2] dt: Add bindings for IDT VersaClock 5P49V5925 | From | Vladimir Barinov <> | Date | Sun, 9 Jul 2017 20:38:28 +0300 |
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On 09.07.2017 16:31, Marek Vasut wrote: > On 07/07/2017 03:57 AM, Vladimir Barinov wrote: >> From: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> >> >> IDT VersaClock 5 5P49V5925 has 4 clock outputs > In 1/2 you said it has 4 FODs and 5 outputs (and it does have 5 outputs, > 4 from FODs and 1 I2C_OUTB). That was a copy typo. Thank you for pointing to this.
> >> , 4 fractional dividers. >> Input clock source can be taken only from external reference clock. >> >> Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> > You might want to rebase this on top of and retest against [1], there > are 8 patches in total fixing some stuff and adding VC6 support. > > [1] https://patchwork.kernel.org/patch/9831797/
I've tested your patch series with ULCB board and HDMI display. I will rebase 5P49V5925 patches on top of them.
Regards, Vladimir
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