Messages in this thread | | | Date | Mon, 3 Jul 2017 08:21:52 +0200 | From | Greg KH <> | Subject | Re: [PATCH] staging: sm750fb: refactor the clock frequency calculation method |
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On Sun, Jul 02, 2017 at 08:24:26PM +0800, Lynn Lei wrote: > speed up calculation by merging two divisions into one.
How much did you speed it up? Please provide proof of anything like this if you say it is a speed up.
> > Signed-off-by: Lynn Lei <lynnl.wit@gmail.com> > --- > drivers/staging/sm750fb/ddk750_chip.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c > index c51761221131..5970c3792f27 100644 > --- a/drivers/staging/sm750fb/ddk750_chip.c > +++ b/drivers/staging/sm750fb/ddk750_chip.c > @@ -44,7 +44,7 @@ static unsigned int get_mxclk_freq(void) > OD = (pll_reg & PLL_CTRL_OD_MASK) >> PLL_CTRL_OD_SHIFT; > POD = (pll_reg & PLL_CTRL_POD_MASK) >> PLL_CTRL_POD_SHIFT; > > - return DEFAULT_INPUT_CLOCK * M / N / (1 << OD) / (1 << POD); > + return DEFAULT_INPUT_CLOCK * M / N / (1 << (OD + POD));
Are you sure that gcc didn't already do this for you? It's a constant number, I doubt this did anything at all.
thanks,
greg k-h
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