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Subject[PATCH 4.12 057/196] powerpc/perf: Fix SDAR_MODE value for continous sampling on Power9
4.12-stable review patch.  If anyone has any objections, please let me know.


From: Madhavan Srinivasan <>

commit 20dd4c624d25156d5ec3345bbb690b98175ef879 upstream.

In case of continous sampling (non-marked), the code currently
sets MMCRA[SDAR_MODE] to 0b01 (Update on TLB miss) for Power9 DD1.

On DD2 and later it copies the sdar_mode value from the event code,
which for most events is 0b00 (No updates).

However we must set a non-zero value for SDAR_MODE when doing
continuous sampling, so honor the event code, unless it's zero, in
which case we use use 0b01 (Update on TLB miss).

Fixes: 78b4416aa249 ("powerpc/perf: Handle sdar_mode for marked event in power9")
Signed-off-by: Madhavan Srinivasan <>
Signed-off-by: Michael Ellerman <>
Signed-off-by: Greg Kroah-Hartman <>

arch/powerpc/perf/isa207-common.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)

--- a/arch/powerpc/perf/isa207-common.c
+++ b/arch/powerpc/perf/isa207-common.c
@@ -90,13 +90,15 @@ static void mmcra_sdar_mode(u64 event, u
* MMCRA[SDAR_MODE] will be set to 0b01
* For rest
* MMCRA[SDAR_MODE] will be set from event code.
+ * If sdar_mode from event is zero, default to 0b01. Hardware
+ * requires that we set a non-zero value.
if (cpu_has_feature(CPU_FTR_ARCH_300)) {
if (is_event_marked(event) || (*mmcra & MMCRA_SAMPLE_ENABLE))
- else if (!cpu_has_feature(CPU_FTR_POWER9_DD1))
+ else if (!cpu_has_feature(CPU_FTR_POWER9_DD1) && p9_SDAR_MODE(event))
*mmcra |= p9_SDAR_MODE(event) << MMCRA_SDAR_MODE_SHIFT;
- else if (cpu_has_feature(CPU_FTR_POWER9_DD1))
+ else
} else

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