Messages in this thread Patch in this message | | | Date | Tue, 18 Jul 2017 05:16:22 -0700 | From | tip-bot for Jiri Olsa <> | Subject | [tip:perf/urgent] perf/x86/intel: Fix debug_store reset field for freq events |
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Commit-ID: dc853e26f73e903e0c87e24f2695b5dcf33b3bc1 Gitweb: http://git.kernel.org/tip/dc853e26f73e903e0c87e24f2695b5dcf33b3bc1 Author: Jiri Olsa <jolsa@kernel.org> AuthorDate: Fri, 14 Jul 2017 18:35:51 +0200 Committer: Ingo Molnar <mingo@kernel.org> CommitDate: Tue, 18 Jul 2017 14:13:41 +0200
perf/x86/intel: Fix debug_store reset field for freq events
There's a bug in PEBs event enabling code, that prevents PEBS freq events to work properly after non freq PEBS event was run.
freq events - perf_event_attr::freq set -F <freq> option of perf record
PEBS events - perf_event_attr::precise_ip > 0 default for perf record
Like in following example with CPU 0 busy, we expect ~10000 samples for following perf tool run:
# perf record -F 10000 -C 0 sleep 1 [ perf record: Woken up 2 times to write data ] [ perf record: Captured and wrote 0.640 MB perf.data (10031 samples) ]
Everything's fine, but once we run non freq PEBS event like:
# perf record -c 10000 -C 0 sleep 1 [ perf record: Woken up 4 times to write data ] [ perf record: Captured and wrote 1.053 MB perf.data (20061 samples) ]
the freq events start to fail like this:
# perf record -F 10000 -C 0 sleep 1 [ perf record: Woken up 1 times to write data ] [ perf record: Captured and wrote 0.185 MB perf.data (40 samples) ]
The issue is in non freq PEBs event initialization of debug_store reset field, which value is used to auto-reload the counter value after PEBS event drain. This value is not being used for PEBS freq events, but once we run non freq event it stays in debug_store data and screws the sample_freq counting for PEBS freq events.
Setting the reset field to 0 for freq events.
Signed-off-by: Jiri Olsa <jolsa@kernel.org> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Kan Liang <kan.liang@intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/20170714163551.19459-1-jolsa@kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org> --- arch/x86/events/intel/ds.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c index 2ca4d2d..6dc8a59 100644 --- a/arch/x86/events/intel/ds.c +++ b/arch/x86/events/intel/ds.c @@ -895,6 +895,8 @@ void intel_pmu_pebs_enable(struct perf_event *event) if (hwc->flags & PERF_X86_EVENT_AUTO_RELOAD) { ds->pebs_event_reset[hwc->idx] = (u64)(-hwc->sample_period) & x86_pmu.cntval_mask; + } else { + ds->pebs_event_reset[hwc->idx] = 0; } }
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